Title Of Paper:
Novel Design of a Nano-metric Fast 4*4 Reversible unsigned Wallace Multiplier Circuit
Author's Name :  Ehsan PourAliAkbar, Hamid Saadi
KeyWords:  Wallace tree, Carry save adder, Reversible logic gates, Reversible logic circuits, Reversible multiplier circuits, Quantum computing, Nanotechnology based systems.
Pages:  13 -24
Volume: 3
Issue: 12
Year: 2015

One of the most promising technologies in designing low-power circuits is reversible computing. It is used in nanotechnology, quantum computing, quantum dot cellular automata (QCA), DNA computing, optical computing and in CMOS low-power designs. Since reversible logic is subject to certain restrictions (e.g. fan-out and feedback are not allowed), traditional synthesis methods are not applicable and specific methods have been developed. In this paper, we offer a Wallace 4*4 reversible multiplier circuits which have faster speed and lower complexity in comparison with the other multiplier circuits. This circuit performs better, regarding to the number of gates, garbage outputs and constant inputs work better than the same circuits. In this paper, Peres gate is used as HA and HNG gate is used as FA. We offer the best method to multiply two 4 bit numbers. These Nano-metric circuits can be used in very complex systems.

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